Alif Semiconductor /AE512F80F55D5AS_CM55_HE_View /DSI /DSI_SDF_3D

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Interpret as DSI_SDF_3D

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)MODE_3D 0 (Val_0x0)FORMAT_3D 0 (Val_0x0)SECOND_VSYNC 0 (Val_0x0)RIGHT_FIRST 0 (SEND_3D_CFG)SEND_3D_CFG

FORMAT_3D=Val_0x0, RIGHT_FIRST=Val_0x0, MODE_3D=Val_0x0, SECOND_VSYNC=Val_0x0

Description

3D Control Register

Fields

MODE_3D

This field defines 3D Mode On/Off and Display Orientation:

0 (Val_0x0): 3D Mode Off , 2D Mode On

1 (Val_0x1): 3D Mode On, Portrait Orientation

2 (Val_0x2): 3D Mode On, Landscape Orientation

FORMAT_3D

This field defines 3D Image Format:

0 (Val_0x0): Alternating lines of left and right data

1 (Val_0x1): Alternating frames of left and right data

2 (Val_0x2): Alternating pixels of left and right data

SECOND_VSYNC

This field defines whether there is a second VSYNC pulse between Left and Right Images, when 3D Image Format is Frame-based:

0 (Val_0x0): No sync pulses between left and right data

1 (Val_0x1): Sync pulse HSYNC, VSYNC, blanking between left and right data

RIGHT_FIRST

This bit defines the left/right order:

0 (Val_0x0): Left eye is sent first, then right eye

1 (Val_0x1): Right eye data is sent first, then left eye

SEND_3D_CFG

When set, causes the next VSS packet to include 3D control payload in every VSS packet.

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